Impedance-Controlled Microstrip
Microstrip or coplanar waveguides from the module RF pins to the antenna port should maintain a 50 Ω characteristic impedance. The impedance is jointly determined by line width, copper thickness, dielectric thickness, and dielectric constant. Deviations can lead to additional reflection and loss. At high frequencies (such as LTE high band and NR), corners should use arcs or chamfers rather than right angles to reduce radiation and impedance discontinuities. If differential lines are used for high-speed digital interfaces, they should also be isolated from the RF section to avoid crosstalk.
Reference Ground and Return Path
RF signal return current flows along the path of minimum inductance in the reference ground plane. If the ground plane under the trace is segmented or has long slots, the return path is forced to detour, forming equivalent inductance and radiation. The area under the module should ensure a complete ground plane, and if necessary, use closely spaced ground vias to stitch it. Careful attention is needed when splitting digital and analog grounds, as incorrect separation can cause common-mode noise and spurious signals. Avoid laying high-speed switching power supplies and crystal traces near cellular modules to reduce near-field coupling.
Partitioning and Shielding
In a typical layout, the PA, filter, and antenna port are placed in the RF area, while the digital baseband and power management are in another area, isolated by a shield or physical distance. The antenna clearance area should be free of metal, large copper planes, and magnetic components. If a spring antenna is used, the pad and feed point positions should strictly follow the module reference design to avoid arbitrarily lengthening traces.
Manufacturability
Impedance tolerance needs to be considered during mass production: variations in laminate thickness can cause impedance drift, so margin can be left around the design center value. Impedance test coupons can be placed at the board edge for process monitoring. For complex boards such as second-order HDI, via stubs and back-drilling may affect high-frequency performance, which should be communicated with the board manufacturer.
Engineering Practice Supplement
Cross-team collaboration for "PCB RF Routing": hardware provides impedance and power budgets, RF provides spurious and sensitivity margins, embedded defines thread models and storage lifetime, and the cloud defines SLA and rate limiting. For NB-IoT scenarios, the business model should match the wake-up cycle, packet length, and downlink capacity; for automotive and mobile scenarios, session retention during switching and roaming should be considered. The project closure should include a "red-team" style review: whether behavior is defined for weak signal, power loss, certificate expiration, clock jumps, and full storage.
How a Slotted Reference Ground Raises Return Inductance
The trace from a module RF pin to the antenna is a controlled-impedance transmission line, commonly a 50-ohm microstrip or coplanar waveguide. Width, dielectric thickness, copper thickness, and dielectric constant together set the impedance. The reference ground under the trace decides which path the return takes. If that plane is slotted, cut out for a connector, or changes layer without a nearby via, the return has to travel farther. Series inductance rises, high-frequency reflection grows, and energy leaks from the slot. This is not the same question as splitting a digital ground. Digital splits are about noise domains. An RF return is about the transmission line's own return path staying intact.
The conditions of use belong in the stack-up, not in a schematic note. The fab's laminate thickness has a tolerance, so the same width drifts in impedance from lot to lot. High-frequency bends should be arcs or miters. A right angle on a high band is both an impedance step and a radiation point. If a connector or a battery well invades the feed point, the ground-via ring, or the antenna keep-out from the module reference design, a later matching network can compensate only part of it. It cannot restore keep-out that the structure has taken.
Stack-up Tolerance and Misread Test Coupons
A common miss is to tune impedance to the center value in simulation and leave no room for laminate variation. The first article then sits on the edge of the specification under a network analyzer. If the board-edge coupon is not on the same layer and the same width as the RF trace, passing the coupon releases boards that are not. Another error is to route a switcher or a crystal directly under the RF trace. Near-field coupling into the receive band shows up as sensitivity that follows digital activity, and changing the antenna does not remove it. Once solder mask and copper thickness eat the ground-gap of a coplanar waveguide, the real impedance no longer matches the calculation, yet the design still places matching parts from the simulation table.
A via stub can resonate at higher frequencies. A second-order board that never agreed back-drill or stack-up with the fab will show spurious that suddenly worsen on one channel. A shield-can pad that lands on the RF trace's reference ground can also pinch the return off. Layout rules should be reviewed together with shielding and grounding. After a routing revision, whether transmit power still sits inside the template has to be remeasured on the same frequency set as production RF calibration. VSWR alone is not enough.
On a respin, check whether the stack-up number changed with the artwork. Width is calculated from the dielectric thickness of a particular layer. If the fab swaps the RF layer with the adjacent ground, the schematic is unchanged and the impedance shifts as a whole. Layer-change vias should appear as a pair on both sides of the trace. A single ground via makes the return detour at the layer change. Copper poured inside the antenna keep-out still pulls the pattern even if it is stitched to ground. "It is grounded" is not a reason to pour there. Ask the fab for the real range of solder-mask thickness and copper tolerance. A simulation that uses only the nominal dielectric constant freezes the matching values. The first article then needs different parts, after the stencil has already been cut for the old pads. The production impedance coupon should share layer, width, and solder mask with the RF trace. A coupon that is not on that layer cannot release the feed.